Exception interface

The ESA/390 exception mechanism allows the processor to change to supervisor state as a result of six different causes: system calls, I/O interrupts, external interrupts, machine checks, restart interruptions or program checks (unusual conditions arising in the execution of instructions).

When exceptions occur:

  1. information (such as the address of the next instruction to be executed after control is returned to the original program) is saved,

  2. program control passes from user to supervisor level, and

  3. software continues execution at an address (the exception vector) predetermined for each exception.

Exceptions may be synchronous or asynchronous. Synchronous exceptions, being caused by instruction execution, can be explicitly generated by a process. The operating system handles an exception either by completing the faulting operation in a manner transparent to the application or by delivering a signal to the application. The correspondence between exceptions and signals is shown in Table 12.

Table 12. Exceptions and Signals

Exception Name

Signal

Examples

Illegal instruction

SIGILL

Illegal or privileged instruction, Invalid instruction form, Optional, unimplemented instruction

Storage access

SIGSEGV

Unmapped instruction or data location access, Storage protection violation

Alignment

SIGBUS

Invalid data item alignment, Invalid memory access

Breakpoint

SIGTRAP

Breakpoint program check

Floating exception

SIGFPE

Floating point overflow or underflow, Floating point divide by zero, Floating point conversion overflow, Other enabled floating point exceptions

The signals that an exception may give rise to are SIGILL, SIGSEGV, SIGBUS, SIGTRAP, and SIGFPE. If one of these signals is generated due to an exception when the signal is blocked, the behavior is undefined.