64-bit PowerPC ELF Application Binary Interface Supplement 1.7.1 | ||
---|---|---|
Prev | Chapter 3. Low Level System Information | Next |
This section discusses the standard function calling sequence, including stack frame layout, register usage, and parameter passing.
C programs follow the conventions given here. For specific information on the implementation of C, see Section 3.5.
![]() | Note |
---|---|
The standard calling sequence requirements apply only to global functions. Local functions that are not reachable from other compilation units may use different conventions as long as they provide traceback tables as described in Section 3.3. Nonetheless, it is recommended that all functions use the standard calling sequences when possible. |
The 64-bit PowerPC Architecture provides 32 general purpose registers, each 64 bits wide. In addition, the architecture provides 32 floating-point registers, each 64 bits wide, and several special purpose registers. All of the integer, special purpose, and floating-point registers are global to all functions in a running program. The following table shows how the registers are used.
r0 Volatile register used in function prologs r1 Stack frame pointer r2 TOC pointer r3 Volatile parameter and return value register r4-r10 Volatile registers used for function parameters r11 Volatile register used in calls by pointer and as an environment pointer for languages which require one r12 Volatile register used for exception handling and glink code r13 Reserved for use as system thread ID r14-r31 Nonvolatile registers used for local variables f0 Volatile scratch register f1-f4 Volatile floating point parameter and return value registers f5-f13 Volatile floating point parameter registers f14-f31 Nonvolatile registers LR Link register (volatile) CTR Loop counter register (volatile) XER Fixed point exception register (volatile) FPSCR Floating point status and control register (volatile) CR0-CR1 Volatile condition code register fields CR2-CR4 Nonvolatile condition code register fields CR5-CR7 Volatile condition code register fields
On processors with the VMX feature.
v0-v1 Volatile scratch registers v2-v13 Volatile vector parameters registers v14-v19 Volatile scratch registers v20-v31 Non-volatile registers vrsave Non-volatile 32-bit register
The existence of the VMX feature will be indicated in the AT_HWCAP auxiliary vector entry.
Registers r1, r14 through r31, and f14 through f31 are nonvolatile, which means that they preserve their values across function calls. Functions which use those registers must save the value before changing it, restoring it before the function returns. Register r2 is technically nonvolatile, but it is handled specially during function calls as described below: in some cases the calling function must restore its value after a function call.
Registers r0, r3 through r12, f0 through f13, and the special purpose registers LR, CTR, XER, and FPSCR are volatile, which means that they are not preserved across function calls. Furthermore, registers r0, r2, r11, and r12 may be modified by cross-module calls, so a function can not assume that the values of one of these registers is that placed there by the calling function.
The condition code register fields CR0, CR1, CR5, CR6, and CR7 are volatile. The condition code register fields CR2, CR3, and CR4 are nonvolatile; a function which modifies them must save and restore at least those fields of the CR. Languages that require "environment pointers" shall use r11 for that purpose.
The following registers have assigned roles in the standard calling sequence:
The stack pointer (stored in r1) shall maintain quadword alignment. It shall always point to the lowest allocated valid stack frame, and grow toward low addresses. The contents of the word at that address always point to the previously allocated stack frame. If required, it can be decremented by the called function. See Section 3.5.13 for additional infromation. As discussed later in this chapter, the lowest valid stack address is 288 bytes less than the value in the stack pointer. The stack pointer must be atomically updated by a single instruction, thus avoiding any timing window in which an interrupt can occur with a partially updated stack.
This register holds the TOC base. See Section 3.5.2 for additional information.
These sets of volatile registers may be modified across function invocations and shall therefore be presumed by the calling function to be destroyed. They are used for passing parameters to the called function. See Section 3.2.3 for additional information. In addition, registers r3 and f1 through f4 are used to return values from the called function, as described in Section 3.2.4.
This register shall contain the address to which a called function normally returns. LR is volatile across function calls.
Signals can interrupt processes (see signal (BA-OS) in the System V Interface Definition). Functions called during signal handling have no unusual restrictions on their use of registers. Moreover, if a signal handling function returns, the process resumes its original execution path with all registers restored to their original values. Thus, programs and compilers may freely use all registers above except those reserved for system use without the danger of signal handlers inadvertently changing their values.
In addition to the registers, each function may have a stack frame on the runtime stack. This stack grows downward from high addresses. The following figure shows the stack frame organization. SP in the figure denotes the stack pointer (general purpose register r1) of the called function after it has executed code establishing its stack frame.
Figure 3-17. Stack Frame Organiztion
High Address +-> Back chain | Floating point register save area | General register save area | VRSAVE save word (32-bits) | Alignment padding (4 or 12 bytes) | Vector register save area (quadword aligned) | Local variable space | Parameter save area (SP + 48) | TOC save area (SP + 40) | link editor doubleword (SP + 32) | compiler doubleword (SP + 24) | LR save area (SP + 16) | CR save area (SP + 8) SP ---> +-- Back chain (SP + 0) Low Address
The following requirements apply to the stack frame:
The stack pointer shall maintain quadword alignment.
The stack pointer shall point to the first word of the lowest allocated stack frame, the "back chain" word. The stack shall grow downward, that is, toward lower addresses. The first word of the stack frame shall always point to the previously allocated stack frame (toward higher addresses), except for the first stack frame, which shall have a back chain of 0 (NULL).
The stack pointer shall be decremented by the called function in its prologue, if required, and restored prior to return.
The stack pointer shall be decremented and the back chain updated atomically using one of the "Store Double Word with Update" instructions, so that the stack pointer always points to the beginning of a linked list of stack frames.
The sizes of the floating-point and general register save areas may vary within a function and are as determined by the traceback table described below.
Before a function changes the value in any nonvolatile floating-point register, frn, it shall save the value in frn in the double word in the floating-point register save area 8*(32-n) bytes before the back chain word of the previous frame. The floating-point register save area is always doubleword aligned. The size of the floating-point register save area depends upon the number of floating point registers which must be saved. It ranges from 0 bytes to a maximum of 144 bytes (18 * 8).
Before a function changes the value in any nonvolatile general register, rn, it shall save the value in rn in the word in the general register save area 8*(32-n) bytes before the low addressed end of the floating-point register save area. The general register save area is always doubleword aligned. The size of the general register save area depends upon the number of general registers which must be saved. It ranges from 0 bytes to a maximum of 144 bytes (18 * 8).
Functions must ensure that the appropriate bits in the vrsave register are set for any vector registers they use. A function that changes the value of the vrsave register shall save the original value of vrsave into the word below the low address end of the general register save area. Below the vrsave save area will be 4 or 12 bytes of alignment padding as needed to ensure that the vector register save area is quadword aligned.
Before a function changes the value in any nonvolatile vector register, vrn, it shall save the value in vrn in the word in the vector register save area 16*(32-n) bytes before the low addressed end of the vrsave save area plus alignment padding. The vector register save area is always quadword aligned. The size of the vector register save area depends upon the number of vector registers which must be saved; it ranges from 0 bytes to a maximum of 192 bytes (12 * 16).
The local variable space contains any local variable storage required by the function. If vector registers are saved the local variable space area will be padded so that the vector register save area is quadword aligned.
The parameter save area shall be allocated by the caller. It shall be doubleword aligned, and shall be at least 8 doublewords in length. If a function needs to pass more than 8 doublewords of arguments, the parameter save area shall be large enough to contain the arguments that the caller stores in it. Its contents are not preserved across function calls.
The TOC save area is used by global linkage code to save the TOC pointer register. See The TOC section later in the chapter.
The link editor doubleword is reserved for use by code generated by the link editor. This ABI does not specify any usage; the AIX link editor uses this space under certain circumstances.
The compiler doubleword is reserved for use by the compiler. This ABI does not specify any usage; the AIX compiler uses this space under certain circumstances.
Before a function calls any other functions, it shall save the value in the LR register in the LR save area.
Before a function changes the value in any nonvolatile field in the condition register, it shall save the values in all the nonvolatile fields of the condition register at the time of entry to the function in the CR save area.
The 288 bytes below the stack pointer is available as volatile storage which is not preserved across function calls. Interrupt handlers and any other functions that might run without an explicit call must take care to preserve this region. If a function does not need more stack space than is available in this area, it does not need to have a stack frame.
The stack frame header consists of the back chain word, the CR save area, the LR save area, the compiler and link editor doublewords, and the TOC save area, for a total of 48 bytes. The back chain word always contains a pointer to the previously allocated stack frame. Before a function calls another function, it shall save the contents of the link register at the time the function was entered in the LR save area of its caller's stack frame and shall establish its own stack frame.
Except for the stack frame header and any padding necessary to make the entire frame a multiple of 16 bytes in length, a function need not allocate space for the areas that it does not use. If a function does not call any other functions and does not require any of the other parts of the stack frame, it need not establish a stack frame. Any padding of the frame as a whole shall be within the local variable area; the parameter save area shall immediately follow the stack frame header, and the register save areas shall contain no padding except as noted for VRSAVE.
For a RISC machine such as 64-bit PowerPC, it is generally more efficient to pass arguments to called functions in registers (both general and floating-point registers) than to construct an argument list in storage or to push them onto a stack. Since all computations must be performed in registers anyway, memory traffic can be eliminated if the caller can compute arguments into registers and pass them in the same registers to the called function, where the called function can then use them for further computation in the same registers. The number of registers implemented in a processor architecture naturally limits the number of arguments that can be passed in this manner.
For the 64-bit PowerPC, up to eight doublewords are passed in general purpose registers, loaded sequentially into general purpose registers r3 through r10. Up to thirteen floating-point arguments can be passed in floating-point registers f1 through f13. If VMX is supported, up to twelve vector parameters can be passed in v2 through v13. If fewer (or no) arguments are passed, the unneeded registers are not loaded and will contain undefined values on entry to the called function.
The parameter save area, which is located at a fixed offset of 48 bytes from the stack pointer, is reserved in each stack frame for use as an argument list. A minimum of 8 doublewords is always reserved. The size of this area must be sufficient to hold the longest argument list being passed by the function which owns the stack frame. Although not all arguments for a particular call are located in storage, consider them to be forming a list in this area, with each argument occupying one or more doublewords.
If more arguments are passed than can be stored in registers, the remaining arguments are stored in the parameter save area. The values passed on the stack are identical to those that have been placed in registers; thus, the stack contains register images.
For variable argument lists, this ABI uses a va_list type which is a pointer to the memory location of the next parameter. Using a simple va_list type means that variable arguments must always be in the same location regardless of type, so that they can be found at runtime. This ABI defines the location to be general registers r3 through r10 for the first eight doublewords and the stack parameter save area thereafter. Alignment requirements such as those for vector types may require the va_list pointer to first be aligned before accessing a value.
The rules for parameter passing are as follows:
Each argument is mapped to as many doublewords of the parameter save area as are required to hold its value.
Single precision floating point values are mapped to the first word in a single doubleword.
Double precision floating point values are mapped to a single doubleword.
Extended precision floating point values are mapped to two consecutive doublewords.
Simple integer types (char, short, int, long, enum) are mapped to a single doubleword. Values shorter than a doubleword are sign or zero extended as necessary.
Complex floating point and complex integer types are mapped as if the argument was specified as separate real and imaginary parts.
Pointers are mapped to a single doubleword.
Vectors are mapped to a single quadword, quadword aligned. This may result in skipped doublewords in the parameter save area.
Fixed size aggregates and unions passed by value are mapped to as many doublewords of the parameter save area as the value uses in memory. Aggregrates and unions are aligned according to their alignment requirements. This may result in doublewords being skipped for alignment.
An aggregate or union smaller than one doubleword in size is padded so that it appears in the least significant bits of the doubleword. All others are padded, if necessary, at their tail. Variable size aggregates or unions are passed by reference.
Other scalar values are mapped to the number of doublewords required by their size.
If the callee has a known prototype, arguments are converted to the type of the corresponding parameter before being mapped into the parameter save area. For example, if a long is used as an argument to a float double parameter, the value is converted to double-precision and mapped to a doubleword in the parameter save area.
Floating point registers f1 through f13 are used consecutively to pass up to 13 single, double and extended precision floating point values, aggregates containing a single floating point number, and to pass the corresponding complex floating point values. The first 13 of all doublewords in the parameter save area that map floating point arguments, except for arguments corresponding to the variable argument part of a callee with a prototype containing an ellipsis, will be passed in floating point registers. A single precision value occupies one register as does a double precision value. Extended precision values occupy two consecutively numbered registers. The corresponding complex values occupy twice as many registers.
Vector registers v2 through v13 are used to consecutively pass up to 12 vector values, except for arguments corresponding to the variable argument part of a callee with a prototype containing an ellipsis.
If there is no known function prototype for a callee, or if the function prototype for a callee contains an ellipsis and the argument value is not part of the fixed arguments described by the prototype, then floating point and vector values are passed according to the following rules for non-floating, non-vector types. In the case of no known prototype this may result in two copies of floating and vector argument values being passed.
General registers are used to pass some values. The first eight doublewords mapped to the parameter save area correspond to the registers r3 through r10. An argument other than floating point and vector values fully described by a prototype, that maps to this area either fully or partially, is passed in the corresponding general registers.
All other arguments (or parts thereof) not already covered must be stored in the parameter save area following the first eight doublewords. The first eight doublewords mapped to the parameter save area are never stored in the parameter save area by the calling function.
If the callee takes the address of any of its parameters, then values passed in registers are stored into the parameter save area by the callee. If the compilation unit for the caller contains a function prototype, but the callee has a mismatching definition, this may result in the wrong values being stored.
Figure 3-18. Parameter Passing
typedef struct { int a; double dd; } sparm; sparm s, t; int c, d, e; long double ld; double ff, gg, hh; x = func(c, ff, d, ld, s, gg, t, e, hh);
Parameter Register Offset in parameter save area c r3 0-7 (not stored in parameter save area) ff f1 8-15 (not stored) d r5 16-23 (not stored) ld f2,f3 24-39 (not stored) s r8,r9 40-55 (not stored) gg f4 56-63 (not stored) t (none) 64-79 (stored in parameter save area) e (none) 80-87 (stored) hh f5 88-95 (not stored)
![]() | Note |
---|---|
If a prototype is not in scope, then the floating point argument ff is also passed in r4, the long double argument ld is also passed in r6 and r7, the floating point argument gg is also passing in r10, and the floating point argument gg is also stored into the parameter save area. If a prototype containing an ellipsis describes any of these floating point arguments as being part of the variable argument part, then the general registers and parameter save area are used as when no prototype is in scope, and the floating point register(s) are not used. |
Functions shall return float or double values in f1, with float values rounded to single precision.
When the VMX facility is supported, functions shall return vector data type values in v2.
Functions shall return values of type int, long, enum, short, and char, or a pointer to any type, as unsigned or signed integers as appropriate, zero- or sign-extended to 64 bits if necessary, in r3. Character arrays of length 8 bytes or less, or bit strings of length 64 bits or less, will be returned right justified in r3. Aggregates or unions of any length, and character strings of length longer than 8 bytes, will be returned in a storage buffer allocated by the caller. The caller will pass the address of this buffer as a hidden first argument in r3, causing the first explicit argument to be passed in r4. This hidden argument is treated as a normal formal parameter, and corresponds to the first doubleword of the parameter save area.
Functions shall return floating point scalar values of size 16 or 32 bytes in f1:f2 and f1:f4, respectively.
Functions shall return floating point complex values of size 16 (four or eight byte complex) in f1:f2 and floating point complex values of size 32 (16 byte complex) in f1:f4.
A function descriptor is a three doubleword data structure that contains the following values:
The first doubleword contains the address of the entry point of the function.
The second doubleword contains the TOC base address for the function (see Section 4.3 later in this chapter).
The third doubleword contains the environment pointer for languages such as Pascal and PL/1.
For an externally visible function, the value of the symbol with the same name as the function is the address of the function descriptor. Symbol names with a dot (.) prefix are reserved for holding entry point addresses. The value of a symbol named ".FN" is the entry point of the function "FN".
The value of a function pointer in a language like C is the address of the function descriptor. Examples of calling a function through a pointer are provided in Section 3.5.11.
When the link editor processes relocatable object files in order to produce an executable or shared object, it must treat direct function calls specially, as described below.